Please use this identifier to cite or link to this item:
http://hdl.handle.net/10263/6226
Title: | Design and implementation of a redundant radix-4 coprocessor with binary interface |
Authors: | Bhattacharjee, Subhasis |
Keywords: | Redundant radix-4 Binary number system Arithmetic operations Logical operations FPGA modules |
Issue Date: | 1998 |
Publisher: | Indian Statistical Institute, Kolkata |
Citation: | 33p. |
Series/Report no.: | Dissertation;98-53 |
Description: | Dissertation under the supervision of Prof. B.P. Sinha, ACM Unit |
URI: | http://hdl.handle.net/10263/6226 |
Appears in Collections: | Dissertations - M Tech (CS) |
Files in This Item:
File | Description | Size | Format | |
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DISS-53.PDF | Dissertation is the original PDF | 483.8 kB | Adobe PDF | View/Open |
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