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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/6385
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dc.contributor.authorChakraborty, Chiranjit-
dc.date.accessioned2016-07-08T15:29:41Z-
dc.date.available2016-07-08T15:29:41Z-
dc.date.issued2009-
dc.identifier.citation50p.en_US
dc.identifier.urihttp://hdl.handle.net/10263/6385-
dc.descriptionDissertation under the supervision of Prof. Susmita Sur-Koleyen_US
dc.language.isoenen_US
dc.publisherIndian Statistical Institute, Kolkataen_US
dc.relation.ispartofseriesDissertation;2009-227-
dc.subjectVLSIen_US
dc.subjectFPGAen_US
dc.subjectFloor planningen_US
dc.titleMulti-layer floorplanning for partial reconfiguration of FPGA devicesen_US
dc.typeThesisen_US
Appears in Collections:Dissertations - M Tech (CS)

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