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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/6447
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dc.contributor.authorDash, Ashis Kumar-
dc.date.accessioned2016-07-12T20:01:44Z-
dc.date.available2016-07-12T20:01:44Z-
dc.date.issued2011-
dc.identifier.citation44p.en_US
dc.identifier.urihttp://hdl.handle.net/10263/6447-
dc.descriptionDissertation under the supervision of Prof. Nabanita Das, ACM Uniten_US
dc.language.isoenen_US
dc.publisherIndian Statistical Institute, Kolkataen_US
dc.relation.ispartofseriesDissertation;2011-290-
dc.subjectCUDA architectureen_US
dc.subjectParallel SAT solveren_US
dc.subjectCNFen_US
dc.titleA study on nvidia CUDA architecture and implementation of parallel SAT solveren_US
dc.typeThesisen_US
Appears in Collections:Dissertations - M Tech (CS)

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