Algorithm for mapping boolean network to LUT based FPGAs

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Date

2001

Journal Title

Journal ISSN

Volume Title

Publisher

Indian Statistical Institute, Kolkata

Abstract

Description

Dissertation under the supervision of Dr. Sushmita Sur-Kolay

Keywords

FPGA, DAG-map algorithms, Boolean network, Mapping

Citation

47p.

Endorsement

Review

Supplemented By

Referenced By