A study on nvidia CUDA architecture and implementation of parallel SAT solver
| dc.contributor.author | Dash, Ashis Kumar | |
| dc.date.accessioned | 2016-07-12T20:01:44Z | |
| dc.date.available | 2016-07-12T20:01:44Z | |
| dc.date.issued | 2011 | |
| dc.description | Dissertation under the supervision of Prof. Nabanita Das, ACM Unit | en_US |
| dc.identifier.citation | 44p. | en_US |
| dc.identifier.uri | http://hdl.handle.net/10263/6447 | |
| dc.language.iso | en | en_US |
| dc.publisher | Indian Statistical Institute, Kolkata | en_US |
| dc.relation.ispartofseries | Dissertation;2011-290 | |
| dc.subject | CUDA architecture | en_US |
| dc.subject | Parallel SAT solver | en_US |
| dc.subject | CNF | en_US |
| dc.title | A study on nvidia CUDA architecture and implementation of parallel SAT solver | en_US |
| dc.type | Thesis | en_US |
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