Deogun, J SBhattacharya, Bhargab B2012-10-192012-10-191989-08IEEE Transactions on Computer-Aided Design, v 8, no.8, p917-920http://hdl.handle.net/10263/4548enDesign automationVLSI channel and switch box routingVia minimizationPermutation graphsVia minimization in VLSI routing with movable terminalsArticle