Majumder, SSur Kolay, SusmitaBhattacharya, Bhargab BDas, S K2011-09-192011-09-192007ACM Transactions on design automation of electronic systemsV12,P141-159http://hdl.handle.net/10263/2574enFloorplanningGlobal routingNetwork flowN P completenessBalanced bipartitioningHierarchical partitioning of VLSI floorplans by staircasesArticle