Dasgupta, Partha SarathiSur Kolay, SusmitaBhattacharya, Bhargab B2012-10-192012-10-191998-09IEEE Transactions on computer -Aided Design of Integrated Circuits and Systems,v.17,no.2,p.126-135http://hdl.handle.net/10263/4552enAND-OR graph searchVLSI floorplaningA unified approach to topology generation and optimal sizing of floorplansArticle